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Feature Articles Let's See What We Have Here

Read all of Eric's articles here.  Topics range from signal integrity basics to 12-port s-parameters.  Read it from the expert!
Featured

PDC-ASID Advanced Signal Integrity Design

Posted in: Signal Integrity

Printed Circuit University ASID Professional Development Certification trains you in applying analysis techniques to find the optimum design for best signal integrity. By using analysis tools such as rules of thumb, approximations and numerical simulation tools, we empower you to analyze the performance impact from design choices. This course applies signal integrity analysis tools to digital products with bit rates below 1 Gbps, focusing on controlled impedance, managing cross talk, minimizing ground bounce, optimizing routing topology and terminations, minimizing discontinuities, designing the power distribution network for low impedance and passing EMC certification tests. We introduce differential pair design, but focus on applications under about 1 Gbps. This online curriculum provides the convenience of learning on your schedule at your current location. After purchasing and then successfully completing this 40-hour online program, including the final exam, you will be awarded a Professional Development Certificate in Advanced Signal Integrity Design. This is equivalent to 4 CEUs (Continuing Education Units). After logging in, your curriculum can be found at Continuing Education -> My Learning Center. 
.

  • You have six months to complete this online curriculum.

  • To pass a quiz, you must score 100%.

  • You may take a quiz as many times as needed in order to pass it.

  • Correct answers are noted, but no clues are given for wrong answers.

  • Price is $595; free for paid Subscribers.

As always, should you have any questions regarding any of the materials, you may contact Pete directly at pwaddell@upmediagroup.com

 
Featured

PCBC-002 Phil Zarrow Chat

Posted in: SMT Assembly

Feb. 7, 2-4 pm EST

Office Hours with SMT Process Consultant Phil Zarrow


Phil Zarrow has been involved with PCB fabrication and assembly for more than 30 years. His expertise includes the manufacture of equipment for circuit board fabrication and assembly of through-hole and surface mount technologies.

In addition to his background in automated assembly and cleaning, Mr. Zarrow is recognized for his expertise in surface mount reflow soldering technology and in the design and implementation of SMT placement equipment and reflow soldering systems.

Having held key technical and management positions with Vitronics, Excellon-Micronetics and Universal Instruments, he has extensive hands-on experience with setup and troubleshooting through-hole and SMT processes throughout the world. He was Director of technology development for EMS firm GSS/Array Technology. In 1993, Mr. Zarrow formed ITM Consulting, and has taught thousands of engineers around the world since that time.

PCB Chat is a moderated question/answer session featuring a new platform created by UP Media Group. Attendees can submit questions privately via this site up to two hours in advance of the chat, or while the chat is live. The chat moderator reviews the questions and chooses which will be answered. As questions are answered, they appear online in sequential fashion. After each chat session is over, the transcript is made available for on-demand viewing. Transcripts are also searchable.

To participate, you must be a registered member of Printed Circuit University.  Click here to sign up for your free membership.

 

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APCU01 Considerations for Proper Layout of a High-Speed PCB

Posted in: Feature Articles

This paper was originally published in the April 2011 issue of PRINTED CIRCUIT DESIGN & FAB. It talks about some of the issues that designers should consider when designing high speed PCBs. According to the author the most important tool at a designers disposal is careful evaluation of considerations to maintain signal integrity.

APCU02 A Look AT CAM Departments

Posted in: Feature Articles

By, Mike Tucker.This presentation examines data requirements, data engineering, design recommendations, rules of thumb and DFM guidelines, and provides the most common reasons designs go on hold at the fabrication stage.

BTS002 What Really is Characteristic Impedance

Posted in: Feature Articles

By Eric Bogatin, originally published in PCD&M Magazine, Jan 2000 Ever wonder what characteristic impedance really means, without invoking equations like the ratio of inductance and capacitance, or without reverting to the solution to the wave equation? This article will give you a precise, intuitive feel for the instantaneous impedance a signal sees when propagating down a transmission line and how this relates to the characteristic impedance of the line. Finally, you’ll understand what impedance an ohmmeter will read if connected to the front of a 50 ohm line. All will be revealed.  

BTS006 What Really is Inductance?

Posted in: Feature Articles

By Eric Bogatin, originally published in PCD&M Magazine, March 2000Inductance is one of the most confusing topics in signal integrity and one of the most important. Problems such as ground bounce, the power distribution network design and many discontinuities are based on inductance effects. If you really want to finally understand what inductance is without invoking integrals or coils, this is the place to start. You will get a clear intuitive understanding of what inductance is and how geometry and physical design features affect inductance. Armed with this understanding, you immediately can see how to solve many signal integrity problems.

BTS008 New Design Methodologies for a New Clock Frequency Regime

Posted in: Feature Articles

By Eric Bogatin, originally published in Computer Design Magazine, Jan 1999   This general review paper introduces the four important problems that arise when interconnects are not transparent, which include reflection noise, crosstalk, ground bounce in the power distribution network and EMI. Examples are given of each effect to illustrate the root cause and significant design features to control these problems.    The most effective way to design high-speed digital products in this new regime is to design these problems out from the beginning. This is done by understanding their root cause and implementing features in the board and components that minimize these important problems. It will only get harder as rise times continually shrink.

BTS009 Creating Design Rules for Interconnect Substrates

Posted in: Feature Articles

By Eric Bogatin, originally published in Proc of IMAPS Annual Conference, Oct. 1997  The most effective method of establishing target design rules for electrical performance of substrates, and balancing the cost/performance tradeoff, is with the use of a field solver. It will calculate the influence of the geometry and material properties on performance. This paper reviews the use of a simple-to-use field solver to explore the design space for MCM-L technology, and identify the leading terms that influence characteristic impedance, crosstalk and their sensitivities. The use of a simple-to-use, automated field solver tool brings the power of complex analysis directly into the hands of any designer. 

BTS010 Bouncing Out Ground Bounce

Posted in: Feature Articles

By Eric Bogatin, originally published in PCD&F, Aug. 2003  Ground bounce is a form of crosstalk that arises when signals share a common return path. In this introductory article, we illustrate the root cause of ground bounce and some of the common methods to control it. If special care is not taken, ground bounce will only get worse with shorter rise times. Not getting your ground bounce in control now will mean certain failure in the future.

BTS013 What You Lose from a Lossy Line

Posted in: Feature Articles

By Eric Bogatin and Gene Garat, originally published in EDN Magazine, Feb 19, 2004At clock frequencies greater than 1 GHz and interconnects longer than 12", transmission line loss effects dominate signal integrity. A flexible simulation tool helps you make early tradeoffs to optimize cost and performance. Key words: conductor loss, dielectric loss, frequency dependent loss, attenuation, rise time degradation, eye diagrams.

BTS018 Rules of Thumb I have Known and Loved

Posted in: Feature Articles

By Eric Bogatin, originally posted Oct. 31, 1999 Rules of thumb are designed to give you a quick answer NOW! They are not designed to be accurate. In this short note, I provide a collection of some of the more important rules of thumb that can be used to provide quick estimates for signal integrity effects. 

BTS020 Critical Length of a Transmission Line

Posted in: Feature Articles

By Eric Bogatin, originally posted on Oct. 1, 2004 All interconnects are always transmission lines and can always be modeled as a transmission line. However, if the interconnect is short enough, it can be approximated by a lumped C or L or a few combinations. In this short paper, we explore the limits to how long an interconnect can be before it can no longer be approximated by Ls and Cs, and the more accurate transmission line model must be used.

BTS022 Signal Integrity and HDI

Posted in: Feature Articles

By Eric Bogatin, originally published in Circuitree Magazine, June 1999HDI technology, also known as micro via or buildup circuit boards, uses fine lines, thin dielectric layers and vias typically 5 mils in diameter that connect adjacent layers. Boards using this technology have a few performance advantages because of the small vias and short interconnects. In this feature article, we review the physical features of HDI substrates and the electrical performance that is possible.

BTS024 How Do You Spell S-Parameters?

Posted in: Feature Articles

By Eric Bogatin, originally published in PCD&M, Feb. 2003S-Parameters are a powerful formalism to describe the high-frequency behavior of interconnects. In its simplest form of insertion and return loss, it describes the way sine waves interact with the interconnect. It can be expanded to include crosstalk effects. In this brief introduction, the concepts behind S-Parameters are introduced and some transmission line examples are used to illustrate the incredible power of S-Parameters.

BTS025 Where will PCBs be after the SoC Revolution?

Posted in: Feature Articles

By Eric Bogatin, originally published in Electronic Products Magazine, Jan. 2000 In this column, Dr. Eric Bogatin addresses the question of how circuit board designs will be affected by the system on a chip revolution.

BTS027 The Power of Planes

Posted in: Feature Articles

This is a feature article Dr. Eric Bogatin wrote for the Feb 2002 issue of PCD&F Magazine about the low inductance of power and ground planes as the real benefit of thin laminates. I describe the current flow in planes and introduce the idea of spreading inductance.

BTS028 Field Solvers and PCB Stack up Analysis: Comparing Measur

Posted in: Feature Articles

By Eric Bogatin, Mike Justice, Todd DeRego and Steve Zimmer, published in the proceedings of the IPC Expo, Long Beach, CA, April 1998 Controlled impedance boards are proliferating in the industry. To help meet the more stringent design demands of these boards, the most versatile tool for the fab engineer is a field solver. With this tool, the design rules can be established, second order effects can be identified or ruled out, and a tolerance analysis can be performed. It is critical to the fabrication engineers to have confidence in the tools they use to establish the geometrical design rules for high-speed boards. We report here general techniques for using a field solver and methods to verify their accuracy using exact analytic expressions and test coupons. We find that the absolute accuracy can be better than 0.5% against analytic expressions and better than 6.5% against actual boards.  This limit is more dependent on the uncertainty in the knowledge of the geometry and material properties of the test structures than the accuracy of the tool.

BTS029 Analysis of Board Layout Helps Cure Jitter Problems

Posted in: Feature Articles

By Eric Bogatin and Gene Garat, published in EDN Magazine, Aug 5, 2004One source of jitter in parallel busses is deterministic jitter caused by crosstalk. In this paper, we analyze this subtle source of jitter and show how it arises from far-end crosstalk in surface traces. Understanding its root cause points to the most efficient method of controlling it, which is by increasing the coupling distance or moving the surface traces to stripline traces, where far-end noise is dramatically reduced. In critical timing applications, this form of deterministic jitter can be important.

BTS030 Backplane Characterization Techniques

Posted in: Feature Articles

By Eric Bogatin, published in the Xcell Journal, Summer 2004.This is a general overview paper on some of the challenges of fixturing and measuring the electrical properties of backplane interconnects, such as launches, ensuring enough measurement bandwidth, generating eye diagrams from the S-Parameters, and how to interpret the S-Parameters.

BTS033 Understanding Signal Integrity

Posted in: Feature Articles

By Eric Bogatin, published as an Agilent Application Note in 2004 This general paper reviews the four common signal integrity problems and some of the design approaches to minimize their impact.

BTS035 Inductance Analysis of Chip Scale Packages

Posted in: Feature Articles

By Eric Bogatin, David Light and Bill Beale, published in 1999 Chip Scale International Conference, San Jose, CA, Sept. 15, 1999 One of the advantages of chip scale packages is their short total path lengths and, hence, low electrical parasitics. For signal paths, the inductive discontinuity of the leads may not be a serious limitation. However, for power and ground distribution, the loop inductance can pose the most important limitation to the highest possible operating clock frequency. In this paper, we develop a simple model to relate the maximum operating clock frequency of a CSP, based on the power dissipation of the chip, the typical lead equivalent inductance, and the number of pairs of leads used for power and ground. Given the significance of the inductance, we illustrate how the equivalent inductance of the leads can be minimized. Finally, for detailed analysis, we show how a field solver can be used to extract the complete inductance description of a CSP.

BTS038 Electrical Modeling of Connectors using Partial Inductanc

Posted in: Feature Articles

By Eric Bogatin, Gus Panela and Mike Brenneman, published in the proceedings of the IICIT Conf, 1997.In this paper, we review how to model multiple conductors in a pni-in-box type connector in terms of their partial inductances to build a SPICE model, and use the results to estimate the expected ground bounce.

BTS039 Has Copper Reached its Limits?

Posted in: Feature Articles

By Eric Bogatin, originally published in PCD&M Magazine, Jan 2004It used to be said that you could never send 2.5 Gbps signals down a circuit board backplane because of the conductor and dielectric losses. Then 2.5 Gbps systems went into production. It used to be said, okay, maybe 2.5 Gbps, but not 5 Gbps. Then 5 Gbps systems were introduced. Okay, maybe 5 Gbps, but surely not 10 Gbps. At 10 Gbps, surely we need to use optical backplanes. Well, even 15 Gbps systems have been demonstrated with FR4 over 50" lengths. What it takes in the design to reach > 10 Gbps performance in FR4 is illustrated in this feature article, as well as a glimpse of future technologies that may enable even 40 Gbps over copper.

BTS042 High Temperature Superconductors Then and Now

Posted in: Feature Articles

This is the Advanced Packaging Technology column Dr. Eric Bogatin wrote for Semiconductor International Magazine, June 2001. He reports on the first commercial application of high-temperature superconductors used in narrow band filters for cell phone base stations.

BTS047 The Zen of Packaging

Posted in: Feature Articles

This is an Advanced Packaging Technology column Dr. Eric Bogatin wrote for Semiconductor International, December 2001. He describes the new micro SMD packaging technology from National Semiconductor Corp., which promises ultra small and ultra fine pitch packages.

BTS068 Tracking Transmission Line Losses

Posted in: Feature Articles

Dr. Eric Bogatin’s No Myths Allowed, published in PCD&F, Jan. 1, 2007 Back drilled vias and microvias are powerful technologies for your arsenal to transport high-speed signals on backplanes. Another major problem to worry about is lossy lines. But, at what bit rate do lossy lines start to play a role? These topics are tackled in this column.

BTS069 Determine the Best Way to Control Signal Effects

Posted in: Feature Articles

Dr. Eric Bogatin’s No Myths Allowed, published in PCD&F, Feb. 1, 2007If you are new to some high-end 2D field solvers, you will be surprised that the coupling capacitances, as displayed in the off diagonal elements, are negative. How can you have a negative capacitance? Is this a problem in the field solver? The negative capacitance arises from the definition of capacitance used by the field solvers. This column explains why it really does make sense.

BTS070 Calculating Characteristic Impedance

Posted in: Feature Articles

Dr. Eric Bogatin’s No Myths Allowed, published in PCD&F, April 1, 2007 Everyone says that if you bring a grounded trace next to a signal line, the impedance of the signal line will drop. This is because of the proximity of the ground next to the signal line. But, is this really true or is this a myth? The only way to know is to put in the numbers using a 2D field solver. The answer will surprise you.

BTS071 The Proximity Effect in Differential Pairs

Posted in: Feature Articles

Originally published in PCD&F magazine, July 2004 

BTS072 Understanding Differential Pairs Differential Signals

Posted in: Feature Articles

Originally posted as my PCD&F column for April 2007  

BTS087 Keeping Differential Impedance Constant

Posted in: Feature Articles

Originally posted as my PCD&F column for Sept 2007  

BTS091 Samtec PowerPoser Offers Smoothing on a Noisy Subject

Posted in: Feature Articles

By Eric Bogatin, released online, Oct. 2007  Samtec has introduced a new component to make the life of the power delivery engineer much easier. This component fits between the BGA and the circuit board and offloads more than 90% of the work the PCB normally does, dramatically reducing the design requirements for the board. This will be an important tool in any designer’s tool box.

BTS092 Looking Under the Sheets at Inductance

Posted in: Feature Articles

By Eric Bogatin, No Myths Allowed, PCD&F, Nov. 2007The loop inductance of a surface trace, or section of power and ground planes, is often an important number to know, especially when it is part of the power delivery network. This column shows that a very simple approximation can be used to estimate the loop inductance of any pair of conductors that is as easy to think of as sheet resistance. It removes the mystery behind the often used term sheet inductance, and turns it into a powerful ally in combating voltage noise problems.  

BTS093 Root Cause Analysis and Learning from Amatuer Magicians

Posted in: Feature Articles

By Eric Bogatin, published in Printed Circuit Design and Manufacture, Dec. 2007Understanding how to reproduce a signal integrity problem is the first step in finding the root cause and resolving the anomaly. Surprisingly, this process is exactly the same as amateur magicians use to deduce the process a professional magician uses to perform his tricks. Read how.

BTS094 A Midlife Kick for Copper

Posted in: Feature Articles

Published Dec. 1, 2007 The series resistance of copper limits the length-bandwidth product for high-density cables to 10 meters for a few Gbps. However, by integrating a special equalizer chip in connectors, the life of copper cables can be dramatically extended.

BTS100 Dont Let Your Signals Stub Their Toes

Posted in: Feature Articles

By Eric Bogatin, published in PCD&F, May 2008The biggest limitation in high-speed circuit boards is not from losses in the lines, but from tiny, residual via stubs. In this paper, the problem introduced by via stubs is analyzed. Even though they represent a tiny fraction of the total interconnect length, they can increase the insertion loss by more than 35 dB in some cases. If you use backplanes and operate at more than 3 Gbps, you need to read this article.

BTS103 Modeling, Simulation and Measurement Techniques for 25 Gb

Posted in: Feature Articles

By Eric Bogatin and Mike Resso, originally published online, May 2008 It covers the general techniques for analyzing high-speed serial backplanes in excess of 10 GHz, suitable for bit rates above 20 Gbps. These methods include VNA measurement, data mining the S-Parameter measurements, using field solvers to analyze the behavior of vias and using advanced methods to extract scalable topology-based circuit models for interconnects that can be used to investigate performance limits in backplanes.

BTS104 New Wave Hits SI

Posted in: Feature Articles

This introductory article appears in Mentor Graphics’ EDA Tech Forum. It introduces the power of S-Parameters for SI applications.

BTS105 From Bit Banger to Gigabit Guru

Posted in: Feature Articles

Published in EDN, Sept. 18, 2008This is a survey article that reviews the four principle signal integrity problems that arise with high-speed serial links, and how design, technology and materials can navigate safe passage around these problems.

BTS108 Four Tips to Reduce Cross Talk

Posted in: Feature Articles

This is a feature article originally published in EDA Tech Forum, Oct. 2008. Dr. Eric Bogatin describes the major sources of crosstalk and four simple design tips to minimize their impact. This includes near- and far-end crosstalk, ground bounce and other types of switching noise.

BTS110 Cross Talk in Differential Pairs

Posted in: Feature Articles

Published in PCD&F, Dec. 2008 Dr. Eric Bogatin puts in the numbers to show that in fact, the coupling in differential pairs has only a weak impact on the worst case crosstalk from an aggressor.

BTS111 Efficiently Designing PDN

Posted in: Feature Articles

By Dr. Eric Bogatin and Chuck FerryThis paper reviews how so many factors interact in the power distribution network and how to explore design space given this complexity. In particular, measurements on a test board are used to verify a simulation tool, and the simulation tool is used to test out some design guidelines. The impedance profile of a number of configurations is described.

BTS112 Controlling Controlled Impedance Boards

Posted in: Feature Articles

In this paper, Dr. Eric Bogatin reviews the need for controlled impedance boards and how to use the combination of 2D field solvers and TDR measurements to efficiently design the stack-up for controlled impedance. An important ingredient to accurate design is an accurate value of the dielectric constant. He shows how to measure the Dk of any board using a simple transmission line test structure, a TDR and a 2D field solver. This technique can be applied to any board.

BTS114 Microstrip or Stripline, that is the question

Posted in: Feature Articles

In this column, originally published in PCD&F, Jan. 25, 2006, Dr. Eric Bogatin discusses the trade-offs between routing signals on surface or buried traces. Both will work, but each topology has its own set of good and bad features. Learn the differences and you will be able to decide for your application which is better: microstrip or stripline.

BTS116 What is the Input Impedance of a Transmission Line?

Posted in: Feature Articles

Originally published in PCD&FWhen a driver sends a signal into a transmission line, what impedance does it see? While the answer depends very much on the characteristic impedance of the line, it may surprise you why it can actually look like an open, a short or anywhere in between.

BTS120 The Maximum Usable Clock Frequency for a Package

Posted in: Feature Articles

By Eric Bogatin, originally published in Printed Circuit Design Magazine, March 2002 Have you ever wondered, "What is the highest clock frequency a package can be used at?"  This is a tricky question because it depends on so many factors. This column offers a simple, first-order approximation to evaluate the highest usable clock frequency for a package.  

BTS121 An Ugly Little Secret About Differential Modes

Posted in: Feature Articles

Originally published in PCD&FConfused about differential impedance, differential mode impedance and odd mode impedance? What's the difference? What do they each mean? All will become clear in this column.

BTS122 An Ideal Transmission Line and the Lumped Circuit Approxi

Posted in: Feature Articles

How do you translate a real transmission line into a SPICE simulation? What is the right electrical model to use for an ideal transmission line? If you are still using a lumped circuit model, there is a better way. Read about it in this PCD&F article.

BTS123 Calculating Effective Dielectric Constant

Posted in: Feature Articles

In microstrip, some of the signal travels in the air above the signal line. This contributes to a higher speed for a signal in microstrip than in stripline. To understand the details, read this column from PCD&F.

BTS124 The Return Current in a Transmission Line

Posted in: Feature Articles

After characteristic impedance, the return current in a transmission line is the most important feature of a transmission line. To learn more about this essential principle, read this article from PCD&F.

BTS125 Put in the Numbers

Posted in: Feature Articles

Originally published in PCD&FWhat distinguishes an engineer from just anyone off the street? What is the most valuable skill ALL engineers should develop?

BTS126 Differential and Common Impedance

Posted in: Feature Articles

Common impedance, common signals, differential impedance, differential signals, odd mode, even mode: How do all these important terms fit together? Learn the right way of thinking about differential pairs in this article Dr. Eric Bogatin wrote in PCD&F.

BTS127 When to Worry About Lossy Lines

Posted in: Feature Articles

ALL transmission lines have some loss, but not always is this property important. Sometimes you don't have to worry about the losses and can simplify the circuit analysis, while other times you may miss an important problem and get the wrong answer, unless you include the effect of losses. To learn the right time and place for lossy line analysis, read this article Dr. Eric Bogatin wrote for PCD&F.

BTS128 Sounding Off on the 'db'

Posted in: Feature Articles

We measure crosstalk in using the dB. We measure attenuation in units of dB. We measure reflection noise in units of the dB. We measure electric field strength in units of dB. And, we measure energy and power in units of dB. What does dB or deciBel really measure, and how did it get such a funny name? Read about it in this piece Dr. Eric Bogatin wrote for PCD&F.

BTS129 Roasting the Myths of Signal Integrity

Posted in: Feature Articles

Dr. Eric Bogatin’s favorite topic in signal integrity is about the myths we carry around. This article discusses four common myths and misconceptions related to return current, guard traces, crosstalk and decoupling capacitance.

BTS130 The Impedance of a Real Capacitor

Posted in: Feature Articles

Decoupling capacitors are the secret sauce of the PDN. But, the electrical performance of real decoupling capacitors is very different than of an ideal capacitor. At high frequency, where they are most important, their actual behavior will surprise you. If you care about PDN performance, this column Dr. Eric Bogatin wrote for PCD&F will be of interest.

BTS131 Leaving 'Ground'

Posted in: Feature Articles

Originally published in PCD&FHere’s a simple piece of advice: Forget the word “ground.” Read here why this word can cause more problems than it fixes.

BTS132 The Capacitance of a Transmission Line

Posted in: Feature Articles

The capacitance of a transmission line is one of its fundamental properties. If you know the characteristic impedance of the line and the time delay, it’s very easy to estimate the capacitance of the line. To learn this technique, read this column Dr. Eric Bogatin wrote for PCD&F.

BTS133 When Accuracy Counts

Posted in: Feature Articles

While it is difficult to build circuit boards with an impedance tolerance that is better than +/- 5%, the accuracy to which we design for a target impedance should be considerably better than this. To understand why accuracy is key, read this column Dr. Eric Bogatin wrote for PCD&F.

BTS134 So Far, So Close

Posted in: Feature Articles

Originally published in PCD&FA popular signal integrity myth is that the return current of one line in a differential pair is carried by the other line. Is this really true?

BTS135 The Inductance of a Transmission Line

Posted in: Feature Articles

The inductance of a transmission line is one of the intrinsic properties of the line. If we know the characteristic impedance of the line and the time delay, we can estimate the total loop inductance in the line. To see how, read this column Dr. Eric Bogatin wrote for PCD&F.

BTS136 What Causes Reflections?

Posted in: Feature Articles

If it weren’t for reflections, the universe as we know it would explode. To find out what really causes reflections of signals when the impedance of an interconnect changes, and to see why we live in a harmonious universe, read this column Dr. Eric Bogatin wrote for PCD&F.

BTS137 Rules of Thumb I Have Known and Loved

Posted in: Feature Articles

While you never want to sign off on a design based on a rule of thumb, sometimes when you want a quick answer now, it can get you a rough idea of the answer. In this column, Dr. Eric Bogatin offers 17 of the more important rules of thumb for designing signal integrity out of your next design.

BTS138 PCB Directions

Posted in: Feature Articles

Struggling with a blank screen in front of you? No idea where to start your circuit board design? No idea of what design guidelines to follow? Use the 17 design guidelines offered in this column Dr. Eric Bogatin wrote for PCD&F as a starting place.

BTS139 The Speed of Electrons

Posted in: Feature Articles

Do electrons really travel at the speed of light in copper? If the signal speed is related to the speed of the electrons, then will lower resistance traces allow faster signals? What else could affect signal speed? If you have ever wondered about these questions and want to know the real answers, read this PCD&F column.

BTS140 Board Stackup's Important Tool

Posted in: Feature Articles

Two coupled single-ended transmission lines with crosstalk make up one differential pair. As a differential pair, it is described by its odd and even mode impedance. To see how crosstalk and odd and even mode impedance are related together, read this column Dr. Eric Bogatin wrote for PCD&F.

BTS141 A High-Bandwidth Probing Plan

Posted in: Feature Articles

Need to connect a coax cable to a circuit board trace? Whenever you make a transition from a coax geometry to a stripline or microstrip, you always create a discontinuity, which can cause problems at higher frequency. Learn how to safely navigate this transition in this column Dr. Eric Bogatin wrote for PCD&F.

BTS142 Insertion Loss and Return Loss

Posted in: Feature Articles

As the bandwidth of digital signals encroach into the microwave regime, the techniques from the microwave world become popular in digital design. Insertion and return loss are two important microwave properties that are critically important for digital designers. Learn what they mean in this PCD&F column.

BTS143 Rise Times and Bandwidths

Posted in: Feature Articles

Are you bilingual? As a digital designer, you probably already speak time domain. If you want to solve problems faster, you should learn to speak frequency domain. This PCD&F column is a good start toward learning how the same signal can be viewed in both the time domain and the frequency domain.

BTS144 Quieting Down a Noisy Problem

Posted in: Feature Articles

Near-end crosstalk is the second most important problem with circuit board traces. Learn a few tricks for reducing this source of noise.

BTS145 Still Good Bang for the Buck

Posted in: Feature Articles

Has copper reached its limits? Will we have to switch to optical interconnects for the next generation of serial links? What knobs can we tweak to get the most performance from circuit boards and copper for the next generation of high-speed serial links? Find out Dr. Eric Bogatin’s analysis in this PCD&F column.

BTS146 When Should I Worry About Lossy Lines?

Posted in: Feature Articles

Lossy transmission lines are a fact of life. Sometimes the loss is important, and sometimes it can be ignored. Find out when to worry about lossy lines in this PCD&F column.

BTS147 Skewing Skew

Posted in: Feature Articles

That uniform differential pair is not so uniform. If one line sees more glass weave than the other line in the pair, significant problems will arise. Find out how to avoid glass weave induced skew in differential pairs in this PCD&F column.

BTS148 Welcome to the Nanontechnology Era

Posted in: Feature Articles

Nanotechnology is part hype, part miracle cure. Read about a potential solution for ESD damage based on a new material leveraging graphite nanotubes in this PCD&F column.

BTS149 Simulating a TDR

Posted in: Feature Articles

TDR is not just for measurements; it is also a powerful way of evaluating any interconnect structure. Learn a simple way of simulating a TDR instrument that can be run in any version of SPICE in this PCD&F column.

BTS150 It's a Wonder Anything Ever Works

Posted in: Feature Articles

What to learn about signal integrity? Got 5 minutes? Here, Dr. Eric Bogatin describes the four important families of signal integrity problems and what you can do about them. If it weren’t for those darn interconnects, signal integrity would be so much easier to deal with.

BTS151 Master of your Domain

Posted in: Feature Articles

Don’t know how to spell S-parameters? Here is a brief introduction of the power they can unlock in describing everything you ever wanted to know about the electrical performance of interconnects.

BTS152 Enter the Matrix

Posted in: Feature Articles

Differential S-parameters have become the most important method of describing the electrical properties of a differential pair. Contained in these parameters are differential impedance, degree of coupling, mode conversion and interconnect bandwidth. Read this introduction for Dr. Eric Bogatin’s PCD&F column.  

BTS153 Yes, Size Does Matter

Posted in: Feature Articles

The most important routing feature that affects the bandwidth of an interconnect is a stub. This is not just related to vias, but to routing and termination as well. Learn more about overcoming this critical limitation.  

BTS154 Tricks of the Trade

Posted in: Feature Articles

Near-end crosstalk in transmission line busses can be a performance limiter. The only way to keep it below a serious level is by following the simple design guideline introduced here.

BTS155 Do Corners Really Cause Reflections?

Posted in: Feature Articles

The most common myth in signal integrity is that you should avoid corners because they cause reflections. Is this really true? In this PCD&F column, Dr. Eric Bogatin shows what he thinks is the origin of this myth and how you can answer the question yourself: Should you worry about corners?

BTS157 A Dose of Reality

Posted in: Feature Articles

Corners absolutely do cause reflections, but the magnitude of the impact is usually so small as to be unimportant. Look into the details of this problem here.

BTS158 An EMC Sweet 16

Posted in: Feature Articles

Passing an FCC EMC test is tough. To increase the chances your next design will pass its emissions test, pay attention to these 16 different design guidelines printed in PCD&F.

BTS159 A Sneaky Noise Path

Posted in: Feature Articles

Even by spacing signals far apart, there is still a sneaky path for crosstalk to enter your system. It is the most common source of coupling between differential channels and can be so large as to swamp some received signals. Learn what the source of this crosstalk is and how to avoid it.

BTS161 No Faith

Posted in: Feature Articles

What’s the right way of selecting capacitors for the PDN? Should you use all the same value capacitors or a distribution? Dr. Eric Bogatin spoke with Steve Weir for his opinion.

BTS162 SPICEing Up Impedance Profiles

Posted in: Feature Articles

SPICE is the most powerful and simplest circuit simulator to use. You can use it to predict the impedance profile of real capacitors used in the power distribution, but first you have to know how to model capacitors. Read about capacitor models here.

BTS163 True Value of Guard Trace

Posted in: Feature Articles

Do guard traces really provide any value? Just how much do they reduce near-end crosstalk? And how should we evaluate their performance?

BTS164 Real World Training

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The Inter-operability Lab at the University of New Hampshire is the “Switzerland” of the networking industry. Read about what they do.

BTS167 Critical Length of a Transmission LIne

Posted in: Feature Articles

This is the Japanese version of a popular paper Dr. Eric Bogatin wrote on the critical length of a transmission line. While each interconnect can ALWAYS be modeled as a transmission line, sometimes, if it is short enough, it can be approximated as an LC section. This article describes when it is okay.

BTS168 Deterministic Jitter

Posted in: Feature Articles

Crosstalk can induce deterministic jitter in a bus. This can be very important in fast busses routed in closely spaced microstrip. Learn the details of this serious problem.

BTS169 How Does Return Current Really Return?

Posted in: Feature Articles

Return current is one of the most important features of a transmission line. Be as careful routing the return current as the signal current. Learn how to think about the return current in transmission lines.

BTS170 Mea Culpa, Mea Maxima Culpa

Posted in: Feature Articles

The saturation length for near-end noise tells you how short you must make the coupled length between two transmission lines for near-end noise to be sensitive to length. Longer than the critical length and near-end noise is independent of length.

BTS171 The Relationship Between Speed and Its Effects

Posted in: Feature Articles

How fast does a signal travel down a transmission line? Surprisingly it has nothing to do with the speed of the electrons in the wire. That it does is a myth and confuses your intuition. Read the real truth about signal speed in this PCD&M article.

BTS172 Riddle Me This, CAD Man

Posted in: Feature Articles

When is a transmission line not a transmission line? Never. This is why the properties of transmission lines are so important. What does a signal see looking into a transmission line? Read the details in this PCD&M article.

BTS173 So, What Do You Do?

Posted in: Feature Articles

"So, what do you do?" may be the scariest four words an engineer can hear at a party. How do you answer this question? Read what Dr. Eric Bogatin heard when he asked some of his fellow signal integrity engineers.  

BTS174 Spice Up Your Designs

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If you do not include simulation in your design flow, you may be heading for a train wreck. Today's simulators come in many flavors, and some can be as easy to use as a spreadsheet. Learn about some of your options here.

BTS175 Appendix A Design for Speed

Posted in: Feature Articles

Signal integrity at your fingertips: Here is a PDF of a popular pocket guide to signal integrity. All in one place, this is a collection of more than 150 design guidelines that will eliminate specific signal integrity problems from your next design. Interconnects are not transparent. If your clock frequency is more than 100 MHz, or rise time less than 1 nsec, and you don’t pay attention, chances are your design will not work. As a start, follow some of these design guidelines, and signal integrity problems will be reduced. Tackle reflection noise, crosstalk, NEXT, FEXT, ground bounce, SSN, power noise, EMI and collapse of the eye problems. Try the ebook version of this document, which can be downloaded by clicking the ebook button.

BTS176 Accuracy of 2D Field Solvers

Posted in: Feature Articles

We use a 2D field solver for its accuracy in predicting the characteristic impedance of transmissions lines. But, just how accurate are they? Find out in this column Dr. Eric Bogatin wrote for PCD&F.

BTS177 Be Afraid

Posted in: Feature Articles

By Eric Bogatin, originally published in Chip Center in 1999As chip features shrink, the rise time of the signals decreases as well. This means the cheapest chips can have sub-nanosecond rise times, and with them, all the signal integrity problems of high-end chips. Find out what the future has in store.

BTS178 Measurements in Multi Gigabit Systems

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Measuring the dielectric properties of laminates is tricky. In this paper Dr. Eric Bogatin presented at DesignCon 2007, he reviews a new technique called the Split Post Resonant Cavity. Learn how to measure the dielectric properties in the GHz regime with this technique.

BTS179 Debunking Myths about Power Distribution

Posted in: Feature Articles

Few topics are as full of myths and just wrong statements as power design. Dr. Eric Bogatin covers four commonly held misconceptions about PDN design, looking at the origins of the statement and the reality. With the analysis he presents in this feature article, you will be able to separate myth from reality.

BTS180 Impedance Calculations

Posted in: Feature Articles

In this paper Dr. Eric Bogatin wrote for Chip Center in 1999, he discusses the importance of impedance calculations and why a field solver is an essential tool to have. He reviews various calculation methods and the role of rules of thumb, approximations and field solvers.

BTS211 EPSI Essential Principles of Signal Integrity class des

Posted in: Feature Articles

The Essential Principles of Signal Integrity (EPSI) is the most important class for you to build your signal integrity career. We introduce a powerful methodology used by thousands of engineers to solve signal integrity problems and design them out of your product right from the beginning. This class will build your engineering intuition to help you find the root cause of problems and fix them at the source. Read the detailed outline in this description and check our web site for the current schedule. New for classes in 2011 are hands on labs. With the software and examples we provide in class, you will accelerate up the learning curve and be empowered to answer your own "it depends" questions.

BTS212 Advanced Signal Integrity Design (ASID) class description

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How much noise will you see in your connector? how high a data rate can you send through your network? how many decoupling capacitors do you need in your design? The most common answer to all signal integrity questions is "it depends". Learn how to answer "it depends" questions by putting in the numbers using analysis techniques. We apply analysis tools to answer the most important signal integrity questions in designs operating under about 2 Gbps.  Read the class description in this paper and check our web site for the schedule.

BTS213 Multi Giga Bit Design (MGBD) class description

Posted in: Feature Articles

If your designs are over 2 Gbps, you deal with differential pairs, lossy lines, mode conversion and channel to channel cross talk. In high speed serial links, a new set of signal integrity problems play a dominant role. In this class these new problems are reviewed and the techniques used to analyze and minimize these problems are covered. If you have high speed serial links in your product, this class is for you. Read the description in this paper and check our web site for the schedule.

BTS214 Signal Integrity Characterization Techniques (SICT) class

Posted in: Feature Articles

Do you deal with TDR or VNA measurements or data? Want to get the most out of these measurements? We show how to interpret time and frequency domain measurements from all interconnects: circuit boards, cables, connectors, packages and backplanes. These topics include differential impedance measurements in the time and frequency domains, ground bounce, cross talk, discontinuities, impedance profiles and insertion and return loss. With this class you will become a master of S-parameters in the time domain and the frequency domain, both single-ended and differential. Read the course outline in this article and check our web site for the schedule.

BTS215 CEC-410 Differential Pair Boot Camp Description

Posted in: Feature Articles

Are you designing one of the alphabet soup high speed serial links like PCIe, SATA, SAS, XAUI, GigE, USB or LVDS? Then all of your interconnects are differential pairs and eliminating signal integrity problems in your design will determine whether your product works or not. In this practical, intensive training class, you will walk away with the understanding, skills, and tools needed to solve real problems. Read the details in this paper and check our web site for the schedule

BTS217 CEC-425 Controlling Transmission Line Loss Boot Camp Desc

Posted in: Feature Articles

If your circuit boards operate at 1 Gbps or above, just meeting a differential impedancespec for circuit boards is not enough. In current and next generation boards, it is critical toalso meet a loss spec.In this boot camp lecture series we bring you up to speed and empower you to control the loss in your transmission lines. This lecture series is ideal for designers and fabricators. Read the details here.

BTS218 Bogatin's 10 Rules

Posted in: Feature Articles

Dr. Eric Bogatin has been writing about, lecturing and teaching signal integrity topics for more than 25 years. He has taught more than 7,000 engineers and personally mentored more than 30. Along the way, he has developed some sayings that crystallize important rules to consider when working on signal integrity projects. Of course, these rules apply to more than just signal integrity. Here is the reprint of the column he wrote for PCD&F, Aug. 10, 2010, that summarizes these top 10 rules.

BTS219 DPD Differential Pair Design Class Description

Posted in: Feature Articles

Are you designing one of the alphabet soup high speed serial links like PCIe, SATA, SAS, XAUI, GigE, USB or LVDS? Then all of your interconnects are differential pairs and eliminating signal integrity problems in your design will determine whether your product works or not.This one-day, intensive training will bring you “up to speed” on how to design the physical interconnects of your channel to improve signal quality and achieve the bit rate you need. We eliminate the myth-conceptions that dominate the industry and show you the right way of designing differential pairs that operate above 10 Gbps.New for classes in 2011 are hands on labs. With the software and examples we provide in class, you will accelerate up the learning curve and be empowered to answer your own "it depends" questions.

Improving Schedules, Cost & Yields: from Schematics to Prototypi

Posted in: Feature Articles

This presentation looks at some of the things designers can do to have a positive effect on cost and yields, starting with schematic entry to the prototype stage.

Thermal Management in Advanced PCBs

Posted in: Feature Articles

Zulki Khan, Syed W. AliThis presentation discusses present PCB thermal management challenges, specific examples of thermal intensive boards and provides some general solutions to those thermal issues, including proper layout techniques and procedures.

What PCB Designers Must Know About Post Assembly Cleaning

Posted in: Feature Articles

By Umut TosunThis presentation covers topics such as industry trends, why we clean PCB assemblies, explains some failure mechanisms and provides several case studies dealing with post-assembly cleaning challenges.

 

 

 

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