Are you designing one of the alphabet soup high speed serial links like PCIe, SATA, SAS, XAUI, GigE, USB or LVDS? Then all of your interconnects are differential pairs and eliminating signal integrity problems in your design will determine whether your product works or not.

In this practical, intensive training class, you will walk away with the understanding, skills, and tools needed to solve real problems. Read the details in this paper and check our web site for the schedule