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BTS029 Analysis of Board Layout Helps Cure Jitter Problems

BTS029 Analysis of Board Layout Helps Cure Jitter Problems

By Eric Bogatin and Gene Garat, published in EDN Magazine, Aug 5, 2004
One source of jitter in parallel busses is deterministic jitter caused by crosstalk. In this paper, we analyze this subtle source of jitter and show how it arises from far-end crosstalk in surface traces. Understanding its root cause points to the most efficient method of controlling it, which is by increasing the coupling distance or moving the surface traces to stripline traces, where far-end noise is dramatically reduced. In critical timing applications, this form of deterministic jitter can be important.

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