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BTS008 New Design Methodologies for a New Clock Frequency Regime

BTS008 New Design Methodologies for a New Clock Frequency Regime

By Eric Bogatin, originally published in Computer Design Magazine, Jan 1999

 
This general review paper introduces the four important problems that arise when interconnects are not transparent, which include reflection noise, crosstalk, ground bounce in the power distribution network and EMI. Examples are given of each effect to illustrate the root cause and significant design features to control these problems. 

 

The most effective way to design high-speed digital products in this new regime is to design these problems out from the beginning. This is done by understanding their root cause and implementing features in the board and components that minimize these important problems. It will only get harder as rise times continually shrink.

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